A quad flat no lead (QFN) package typically includes an integrated circuit (IC) die attached and electrically connected to a lead frame with one or more rows of lead terminals. The IC die, the electrical connections and a portion of the lead frame are encapsulated by a mold compound, leaving a portion of the leads exposed. The exposed leads serve as input and output (IO) connections to the encapsulated IC die and are typically located along a periphery of the QFN package. QFN packages are widely used because they can provide a number of advantages over other lead frame package configurations including, for example, shorter electrical paths and faster signal communication rates.
Increasingly, device manufacturers are moving toward system-in-package (SiP) solutions. An SiP includes a number of integrated circuits enclosed in a single module (i.e., a package) that can perform all or most of the functions of an electronic system. An SiP may contain one or more IC dies, or chips, plus additional components that are traditionally included on the system motherboard. The IC dies may be stacked vertically or tiled horizontally on a substrate, and they can be internally connected by fine wires that are bonded to the package. Alternatively, with flip chip technology, solder bumps can be used to join the stacked chips together. The additional components within an SiP can include surface mount discrete passive components, integrated passive networks, passive components embedded or patterned in the package substrate, microelectromechanical systems (MEMS) devices, shields, and so forth.
A primary goal of electronic device manufacturing and packaging is to produce smaller integrated electronic packages at lower cost. Smaller integrated electronic packages have a smaller footprint, which is desirable for smaller end products. To that end, continued progress in size reduction of the IC dies and the associated active and passive components also require size reduction of the packaging. But commensurate with the need for smaller footprint and low cost solutions, is the demand for increased functionality and complexity of the IC dies as well as of the active and passive components integrated into the package, along with the same or greater complexity of the electrical connections with external circuits.